1. Field of the Invention
This invention relates to a plastic-molded-type semiconductor device, and more particularly to a semiconductor device suitable for integrally sealing a plurality of semiconductor chips at a high density.
2. Description of the Prior Art
As conventional methods of enhancing the degree of integration of semiconductor chips in a plastic-molded-type semiconductor device having a limited external size, there are known a method, as disclosed in Japanese Patent Unexamined Publication No. 62-109333, in which semiconductor chips are attached to opposite sides of one lead frame, and they are integrally joined together by plastic molding, and a method, as disclosed in Japanese Patent Unexamined Publication Nos. 57-148362 and 62-119952, in which a plurality of lead frames each having a semiconductor chip attached to only one side thereof are stacked, and are integrally joined together by plastic molding.
With respect to the above prior art method of mounting the semiconductor chips on both sides of the lead frame, electrodes on the surface of the semiconductor chip on one side of the lead frame are wire-bonded to the leads of the lead frame, using fine metal wires, and then after the lead frame is inverted, the wire bonding of the semiconductor chip on the other side of the lead frame must be done. Thus, two separate wire bondings, must be performed, which increases the number of production steps, and besides the side of the lead frame already subjected to the wire bonding is fixedly supported on a support bed, and in this condition the wire bonding of the other side is performed. Therefore, there has been encountered a problem that the fine metal wires on the side first subjected to the wire bonding are deformed, so that the fine metal wires are contacted with each other or are broken.
On the other hand, with respect to the method using the plurality of lead frames, the lead frames are connected together by spot welding or the like before the resin molding is carried out. Then, the resin molding is carried out using a two-split type mold used for holding an ordinary lead frame therebetween from upper and lower sides, or the resin molding must be performed using an at least three-split type mold of a complicated structure capable of dealing with a plurality of lead frames. In either case, there has been encountered a problem that the efficiency of the assembling operation is lowered.
Further, in the method disclosed in Japanese Patent Unexamined Publication No. 62-109333, in which the wire bonding is used for connecting the semiconductor chips to the lead, the fine metal wires for each of the laminated semiconductor chips are connected in a curved manner resembling a mountain, so that a certain height must be secured, which results in a problem that the overall thickness of the semiconductor device can not be reduced.